IIT Madras is hosting the 3rd Digital India RISC-V (DIR-V) Symposium 2026 at its Research Park in Chennai, starting Saturday, August 1, and running through August 2, 2026.
The two-day event is organised in partnership with the Ministry of Electronics and Information Technology (MeitY) and RISC-V International, bringing together policymakers, global technology experts, researchers, startups, investors, faculty and students.
This year’s theme, ‘Empowering Bharat’s Semiconductor Future,’ focuses on indigenous processor technologies, secure computing systems, hardware innovation, artificial intelligence and the country’s expanding RISC-V ecosystem.
The programme includes keynote addresses, technical sessions, panel discussions, hands-on workshops, technology demonstrations, exhibitions and startup showcases, along with the DIR-V Grand Challenge Hackathon featuring RISC-V projects by students and startups.
Registrations for in-person attendance closed on July 26, 2026, once the venue reached capacity, though the symposium is being live-streamed on YouTube with no registration required to watch.
RISC-V’s open-standard, licence-free architecture has made it a focal point of India’s drive to build domestic chip design capability and reduce dependence on imported processors.
India’s semiconductor push has gathered pace over the past two years, with the government backing fabrication units, chip design centres and research programmes aimed at reducing reliance on imported processors.
IIT Madras Research Park, the venue for this year’s symposium, has emerged as a hub for deep-tech startups working on hardware, semiconductors and embedded systems in the country.
Previous editions of the DIR-V symposium have drawn participation from chip designers, academic researchers and government officials, reflecting the event’s role as a meeting point for India’s RISC-V ecosystem.
MeitY has separately backed the development of indigenous RISC-V-based processors under its Digital India programme, part of a broader effort to build chip design capability alongside manufacturing incentives.
The Chennai event follows two earlier editions of the DIR-V symposium, each of which expanded in scale as more startups, research institutions and global chip companies engaged with India’s RISC-V initiatives.
Photo by Tester051005, Wikimedia Commons, CC BY-SA 4.0